Proceedings PaperConstraints in the construction of computers with ever-larger numbers of processors
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As a parallelism of digital computers increases, the limitations associated with interconnecting a large number of processors becomes a greater and greater constraint on system performance. For example, as we pack more and more processors of a given size together in a single machine, naturally the physical dimensions of the machine must grow, and with that growth comes an increase in the maximum time delay experienced in communicating between the most distant processors in the array. To a degree that depends on the algorithm being executed and its communication requirements, that communication latency between different parts of the machine ultimately poses a limit to the speed with which the machine can solve problems. Our purpose in this paper is to discuss some of the fundamental aspects of the problem described above. We consider in what follows two different cases: (1) all interconnections are optical, and (2) all interconnections are electrical. Of course with a hybrid set of interconnects (i.e. part optical and part electrical), better performance can be achieved. However, we do not consider hybrid strategies in this paper.