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Proceedings Paper

Architecture and building blocks for VME optical backplane bus
Author(s): Ray T. Chen
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Paper Abstract

To eliminate the intrinsic problem associated with electrical interconnects, processor-to- processor interconnects based on fiber optics are under development. The major bottleneck of fiber-based optical interconnects is their point-to-point characteristic which seriously limits their interconnectivity. As a result of the low interconnectivity, multiplexing/demultiplexing (e.g., 1:1024 and 1024:1) technology was employed to minimize optical channels. This approach significantly reduces the bandwidth of the data transfer rate. Moreover, it is incompatible with most of the IEEE standard buses (such as FASTBUS, VMEbus, and Futurebus). The high density highly distributed channel waveguide array presented in this paper is the only feasible solution to provide a lithographically defined optical interconnection network with full compatibility of IEEE standard and special purpose high performance bus systems.

Paper Details

Date Published: 1 July 1993
PDF: 13 pages
Proc. SPIE 1849, Optoelectronic Interconnects, (1 July 1993); doi: 10.1117/12.147094
Show Author Affiliations
Ray T. Chen, Univ. of Texas/Austin (United States)


Published in SPIE Proceedings Vol. 1849:
Optoelectronic Interconnects
Ray T. Chen, Editor(s)

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