Share Email Print
cover

Proceedings Paper

Improvement of metal step coverage of VLSI device structures in a manufacturing environment
Author(s): Rob B. MacNaughton; T. H. Wonacott; De-Dui Liao; Hoang Huy Hoang
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Methods of improving aluminum alloy step coverage, such as high temperature and low power processing, have become well known. Unfortunately, these methods nearly always have drawbacks such as throughput. The process, therefore, needs to be optimized on a case by case basis. An example is provided in this paper for the case of 0.95 micron contacts (1.20 aspect ratio) starting with double level Al-0.5% Cu-1.0% Si with TiN barrier under first level metal and pure Ti under second level metal; 30% step coverage deemed acceptable. Another drawback to standard high temperature Al alloy deposition is the problem of random metal voids. Methods to alleviate this problem are also discussed. Thus there are 2 distinct types of step coverage issues that must be considered separately: (1) inherent step coverage, and (2) random voids. Optimization of each needs to be performed independently.

Paper Details

Date Published: 21 May 1993
PDF: 15 pages
Proc. SPIE 1805, Submicrometer Metallization: Challenges, Opportunities, and Limitations, (21 May 1993); doi: 10.1117/12.145469
Show Author Affiliations
Rob B. MacNaughton, SGS-Thomson Microelectronics (United States)
T. H. Wonacott, SGS-Thomson Microelectronics (United States)
De-Dui Liao, SGS-Thomson Microelectronics (United States)
Hoang Huy Hoang, SGS-Thomson Microelectronics (United States)


Published in SPIE Proceedings Vol. 1805:
Submicrometer Metallization: Challenges, Opportunities, and Limitations
Thomas Kwok; Takamaro Kikkawa; Krishna Shenai, Editor(s)

© SPIE. Terms of Use
Back to Top