Share Email Print

Proceedings Paper

Step-by-step design of a gain-adjustable neuron cell
Author(s): Chiewcharn Narathong; J. Staab; S. Geiger
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

The objective of this research project is to develop an optimally sized analog CMOS neuron cell library. This neuron cell together with the optimal synapse developed previously can be used to construct a high density VLSI neural network. The standard cell library allows a neural network designer to concentrate on applying his/her networks as well as evaluating learning algorithms. In order to achieve this objective, a set of optimal design equations was derived from standard CMOS equations. This paper includes both the derivation of the design equations and the evaluation of the size (silicon area) and performance of the neuron cell.

Paper Details

Date Published: 1 July 1992
PDF: 12 pages
Proc. SPIE 1710, Science of Artificial Neural Networks, (1 July 1992); doi: 10.1117/12.140084
Show Author Affiliations
Chiewcharn Narathong, Univ. of Wisconsin/Platteville (United States)
J. Staab, Univ. of Wisconsin/Platteville (United States)
S. Geiger, Univ. of Wisconsin/Platteville (United States)

Published in SPIE Proceedings Vol. 1710:
Science of Artificial Neural Networks
Dennis W. Ruck, Editor(s)

© SPIE. Terms of Use
Back to Top