Share Email Print

Proceedings Paper

Digital signal processor accelerator board for image processing on VMEbus-based systems
Author(s): Rui M. Boucho-Oliveira; Santiago Lorenzo; Luis L. Nozal; Muzhir Shaban Mohammed
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

The computational resources needed to implement image processing algorithms exceed the capability of most current VMEbus architectures. This is no reason to abandon these systems that are widely used, if we can complement them with the appropriate tools. In this paper we describe an architecture based on Digital Signal Processors (DSPs), VMEbus compatible, to accomplish the calculation intensive routines of the image processing algorithms.

Paper Details

Date Published: 1 November 1992
PDF: 6 pages
Proc. SPIE 1823, Machine Vision Applications, Architectures, and Systems Integration, (1 November 1992); doi: 10.1117/12.132066
Show Author Affiliations
Rui M. Boucho-Oliveira, Univ. de Valladolid (Spain)
Santiago Lorenzo, ETS de Ingenieros Industriales (Spain)
Luis L. Nozal, ETS de Ingenieros Industriales (Spain)
Muzhir Shaban Mohammed, ETS de Ingenieros Industriales (Spain)

Published in SPIE Proceedings Vol. 1823:
Machine Vision Applications, Architectures, and Systems Integration
Bruce G. Batchelor; Susan Snell Solomon; Frederick M. Waltz, Editor(s)

© SPIE. Terms of Use
Back to Top