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Proceedings Paper

High-voltage structure of MOS transistor for LCD driver circuits application
Author(s): Kun-Zen Chang; Jinnu-Fu Liou; Mei-Li Chiou; S. W. Chang
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Paper Abstract

A high-voltage structure of MOS devices has been proposed in this work. Both NMOS and PMOS devices with the high-voltage structure have been fabricated using standard P-well CMOS process with 3 micrometers design rule. In order to increase the breakdown voltage of junction between drain/source and bulk of MOS devices, the high doping concentration of field region is separated from double-diffused drain/source region of MOS devices in this structure. The breakdown voltage of 65 and 70 V has been obtained for NMOS and PMOS, respectively. The purpose of this work is mainly developing a high-voltage MOS device for the circuits design of LCD drive.

Paper Details

Date Published: 27 October 1992
PDF: 8 pages
Proc. SPIE 1815, Display Technologies, (27 October 1992); doi: 10.1117/12.131312
Show Author Affiliations
Kun-Zen Chang, Industrial Technology Research Institute (Taiwan)
Jinnu-Fu Liou, Industrial Technology Research Institute (Taiwan)
Mei-Li Chiou, Industrial Technology Research Institute (Taiwan)
S. W. Chang, Industrial Technology Research Institute (Taiwan)

Published in SPIE Proceedings Vol. 1815:
Display Technologies
Shu-Hsia Chen; Shin-Tson Wu, Editor(s)

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