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Proceedings Paper

Characterization of degradation processes in MOS VLSI structures
Author(s): Tomasz Brozek; Andrzej Jakubowski; Bogdan Majkusiak
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Paper Abstract

The detailed investigations of degradation processes, their characterization and understanding of mechanisms responsible for degradation is of great technological interest, both from the fabrication point of view, and as a long-term reliability concern. Some of the effects usually need investigation in the completed MOS transistor structure (hot carrier degradation, threshold voltage, and channel mobility deterioration), but others should be studied with the special test structures so that effects can be investigated independently (electromigration, radiation effects, oxide wear-out). The paper presents a review of problems related to reliability of VLSI ICs, degradation processes, and their characterization.

Paper Details

Date Published: 1 August 1992
PDF: 10 pages
Proc. SPIE 1783, International Conference of Microelectronics: Microelectronics '92, (1 August 1992); doi: 10.1117/12.131011
Show Author Affiliations
Tomasz Brozek, Warsaw Univ. of Technology (Poland)
Andrzej Jakubowski, Warsaw Univ. of Technology and Institute of Electron Technology (Poland)
Bogdan Majkusiak, Warsaw Univ. of Technology (Poland)

Published in SPIE Proceedings Vol. 1783:
International Conference of Microelectronics: Microelectronics '92
Andrzej Sowinski; Jan Grzybowski; Witold T. Kucharski; Ryszard S. Romaniuk, Editor(s)

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