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Optical Engineering

An 8×64 pixel dot matrix microdisplay in 0.35-μm complementary metal-oxide semiconductor technology
Author(s): Petrus J. Venter; Monuko du Plessis; Alfons Willi Bogalecki; Marius E. Goosen; Pieter Rademeyer
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Paper Abstract

Microdisplay technologies for near-to-eye applications mostly use a complementary metal-oxide semiconductor (CMOS) processing chip as backplane for pixel addressing, with extensive post-processing on top of the CMOS chip to deposit organic LED or liquid crystal layers. Here, we examine the possibility of integrating emissive microdisplays within the CMOS chip, with absolutely no post processing needed. This will dramatically reduce the manufacturing cost of microdisplays and may lead to new microdisplay applications. Visible electroluminescence is achieved by biasing pn junctions into avalanche breakdown mode. The most appropriate CMOS pn junction is selected and innovative techniques are applied to increase the light extraction efficiency from the CMOS chip using the metal layers of the CMOS process. An 8×64 dot matrix microdisplay was designed and manufactured in a 0.35-μm CMOS technology. The experimental results show that a luminance level of 20  cd/m2 can be reached, which is an adequate luminance value in order to comfortably read data being displayed in relatively dark environments. The electrical power dissipation per pixel being activated is 0.9  mW/pixel. It is also shown that the pixels can be switched at a rate faster than 350 MHz.

Paper Details

Date Published: 6 February 2012
PDF: 8 pages
Opt. Eng. 51(1) 014003 doi: 10.1117/1.OE.51.1.014003
Published in: Optical Engineering Volume 51, Issue 1
Show Author Affiliations
Petrus J. Venter, Univ. of Pretoria (South Africa)
Monuko du Plessis, Univ. of Pretoria (South Africa)
Alfons Willi Bogalecki, INSiAVA (Pty) Ltd. (South Africa)
Marius E. Goosen, INSiAVA (Pty) Ltd. (South Africa)
Pieter Rademeyer, INSiAVA (Pty) Ltd. (South Africa)

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