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Journal of Photonics for Energy

Effects of microcell layout on the performance of GaN-based high-voltage light-emitting diodes
Author(s): Shuguang Li; Kin-Tak Lam; Wei-Chih Huang; Shoou-Jinn Chang
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Paper Abstract

We report the effects of microcell layout on the performances of GaN-based high-voltage light-emitting diodes (HV-LEDs). Compared with samples with an S-type layout pattern, it was found that the samples with an I-type layout pattern exhibit smaller forward voltage, larger light output power, lower thermal temperature, and better wall-plug efficiency (WPE). It was also found that we could further improve the performances of HV-LED chips by introducing extra metal fingers to enhance current spreading. Compared with the S-type sample without metal fingers, we could reduce the efficiency droop from 38.6% to 14.8% by using an I-type sample with metal fingers. Furthermore, it was found that WPE reduced by around 40% after a 1000 h aging test for the S-type sample without metal fingers. In contrast, almost no decrease in WPE could be observed from the I-type sample with metal fingers after the same aging time.

Paper Details

Date Published: 9 March 2015
PDF: 9 pages
J. Photon. Energy. 5(1) 057605 doi: 10.1117/1.JPE.5.057605
Published in: Journal of Photonics for Energy Volume 5, Issue 1
Show Author Affiliations
Shuguang Li, East China Univ. of Petroleum (China)
Kin-Tak Lam, Fuzhou Univ. (China)
Wei-Chih Huang, National Cheng Kung Univ. (Taiwan)
Shoou-Jinn Chang, National Cheng Kung Univ. (Taiwan)


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