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Journal of Micro/Nanolithography, MEMS, and MOEMS

Macroinspection methodology for through silicon via array in three-dimensional integrated circuit
Author(s): Yoshihiko Fujimori; Takashi Tsuto; Hiroyuki Tsukamoto; Kazuya Okamoto; Kyoichi Suwa
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Paper Abstract

We are developing a new macroinspection technology for through silicon via (TSV) process wafers. We present new simulation results obtained with a fine TSV model and new optics. The optical system includes not only diffraction optics, but also polarization optics, by which we can detect changes in the profile (cross-sectional shape) of repeated patterns by detecting changes in the polarization status of reflected light. We confirmed the performance of the methodology by optical simulation using a model of via patterns with 1 μm diameter and 10 μm depth as a typical intermediate-interconnect-level TSV.

Paper Details

Date Published: 29 January 2014
PDF: 8 pages
J. Micro/Nanolith. 13(1) 011204 doi: 10.1117/1.JMM.13.1.011204
Published in: Journal of Micro/Nanolithography, MEMS, and MOEMS Volume 13, Issue 1
Show Author Affiliations
Yoshihiko Fujimori, Nikon Corp. (Japan)
Takashi Tsuto, Nikon Corp. (Japan)
Hiroyuki Tsukamoto, Nikon Corp. (Japan)
Kazuya Okamoto, Nikon Corp. (Japan)
Kyoichi Suwa, Nikon Corp. (Japan)


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