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Journal of Electronic Imaging

Accelerating object detection via a visual-feature-directed search cascade: algorithm and field programmable gate array implementation
Author(s): Christos Kyrkou; Theocharis Theocharides
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Paper Abstract

Object detection is a major step in several computer vision applications and a requirement for most smart camera systems. Recent advances in hardware acceleration for real-time object detection feature extensive use of reconfigurable hardware [field programmable gate arrays (FPGAs)], and relevant research has produced quite fascinating results, in both the accuracy of the detection algorithms as well as the performance in terms of frames per second (fps) for use in embedded smart camera systems. Detecting objects in images, however, is a daunting task and often involves hardware-inefficient steps, both in terms of the datapath design and in terms of input/output and memory access patterns. We present how a visual-feature-directed search cascade composed of motion detection, depth computation, and edge detection, can have a significant impact in reducing the data that needs to be examined by the classification engine for the presence of an object of interest. Experimental results on a Spartan 6 FPGA platform for face detection indicate data search reduction of up to 95%, which results in the system being able to process up to 50 1024×768  pixels images per second with a significantly reduced number of false positives.

Paper Details

Date Published: 3 August 2016
PDF: 14 pages
J. Electron. Imag. 25(4) 041013 doi: 10.1117/1.JEI.25.4.041013
Published in: Journal of Electronic Imaging Volume 25, Issue 4
Show Author Affiliations
Christos Kyrkou, Univ. of Cyprus (Cyprus)
Theocharis Theocharides, Univ. of Cyprus (Cyprus)

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