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Journal of Micro/Nanolithography, MEMS, and MOEMS

Nanoimprint lithography and future patterning for semiconductor devices
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Paper Abstract

Nanoimprint lithography (NIL) has the potential capability of high resolution with critical dimension uniformity that is suited for patterning shrinkage, as well as providing a low cost advantage. However, the defectivity of NIL is an impediment to the practical use of the technology in semiconductor manufacturing. We have evaluated defect levels of NIL and have classified defectivity into three categories; nonfill defects, template defects, and plug defects. New materials for both the template and resist processes reduce these defects to practical levels. Electric yields of NIL are also discussed.

Paper Details

Date Published: 1 October 2011
PDF: 8 pages
J. Micro/Nanolith. MEMS MOEMS 10(4) 043008 doi: 10.1117/1.3658024
Published in: Journal of Micro/Nanolithography, MEMS, and MOEMS Volume 10, Issue 4
Show Author Affiliations
Tatsuhiko Higashiki, Toshiba Corp. (Japan)
Tetsuro Nakasugi, Toshiba Corp. (Japan)
Ikuo Yoneda, Toshiba Corp. (Japan)

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