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Journal of Micro/Nanolithography, MEMS, and MOEMS

Double-patterning interactions with wafer processing, optical proximity correction, and physical design flows
Author(s): Kevin Lucas; Christopher M. Cork; Alexander Miloslavsky; Gerard Luk-Pat; Levi D. Barnes; John Hapli; John Lewellen; Gregory Rollins; Vincent Wiaux; Staf Verhaegen
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Paper Abstract

In this paper we study interactions of double patterning technology (DPT) with lithography, optical proximity correction (OPC) and physical design flows for the 22-nm device node. DPT methods decompose the original design intent into two individual masking layers, which are each patterned using single exposures and existing 193-nm lithography tools. Double exposure and etch patterning steps create complexity for both process and design flows. DPT decomposition is a critical software step that will be performed in physical design and also in mask synthesis. Decomposition includes cutting (splitting) of original design intent polygons into multiple polygons, where required, and coloring of the resulting polygons. We evaluate the ability to meet key physical design goals, such as reduce circuit area, minimize relayout effort, ensure DPT compliance, guarantee patterning robustness on individual layer targets, ensure symmetric wafer results, and create uniform wafer density for the individual patterning layers.

Paper Details

Date Published: 1 July 2009
PDF: 10 pages
J. Micro/Nanolith. 8(3) 033002 doi: 10.1117/1.3158061
Published in: Journal of Micro/Nanolithography, MEMS, and MOEMS Volume 8, Issue 3
Show Author Affiliations
Kevin Lucas, Synopsys, Inc. (United States)
Christopher M. Cork, Synopsys SARL (France)
Alexander Miloslavsky, Synopsys, Inc. (United States)
Gerard Luk-Pat, Synopsys, Inc. (United States)
Levi D. Barnes, Synopsys, Inc. (United States)
John Hapli, Synopsys, Inc. (Canada)
John Lewellen, Synopsys, Inc. (United States)
Gregory Rollins, Synopsys, Inc. (United States)
Vincent Wiaux, IMEC (Belgium)
Staf Verhaegen, IMEC (Belgium)


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