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Spie Press Book

Heterogeneous Optoelectronic Integration
Editor(s): Elias Towe
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Book Description

Numerous efforts are directed at investigating the use of optics at short distances--for example, at the chip-to-chip and board-to-board levels of the interconnection hierarchy. This book provides an overview of the state of the art in heterogeneous integration of electronics, optoelectronics, and micro-optics for short-distance optical interconnections.

Book Details

Date Published: 10 November 2000
Pages: 282
ISBN: 9780819435712
Volume: PM89

Table of Contents
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Clifton G. Fonstad, Jr. / 3
1.1 Introduction / 3
1.2 Hybrid, Monolithic, and Psuedomonolithic Integration / 4
1.3 Materials Issues in Integration / 7
1.4 Gallium Arsenide-on-Silicon / 10
1.5 Epitaxy-on-Electronics / 14
1.6 Silicon-on-Gallium Arsenide / 27
1.7 Aligned-Pillar Bonding / 35
1.8 Conclusion and Acknowledgements / 40
References / 41
Leon M. F. Chirovsky, Ashok V. Krishnamoorthy, William S. Hobson, John Lopata, Keith W. Goossen, and L. Arthur D'Asaro / 49
2.1 Motivation for the Work / 49
2.2 Background Information / 52
2.3 Detailed Description of an I2-VCSEL, the First Implementation of the
P2I2-VCSEL Design Strategy / 54
2.4 Data on the First, Top-Emitting I2-VCSELs / 57
2.5 Data on Bottom-Emitting and on Hybrid-Integrated I2-VCSELs / 59
2.6 Design Modifications for High-Speed P2I2-VCSELs / 66
2.7 Data on High-Speed P2I2-VCSELs and its Analysis / 67
2.8 Conclusion / 70
Acknowledgements / 72
References / 72
Carl W. Wilmsen and Rui Pu / 75
3.1 Introduction / 75
3.2 General Discussion of Possible Methods of Bonding VCSELs to CMOS /76
3.3 Review of Heterogeneous Integration of VCSELs and Electronic Circuits /79
3.4 Overview and Details of Bonding Techniques / 80
3.5 Electrical and Optical Characteristics / 89
3.6 Thermal Characteristics / 95
3.7 Comparison of These Results with Other Methods and Appraisal of These Techniques / 104
3.8 Applications / 112
3.9 Summary / 115
Acknowledgements / 116
References / 117
Duane A. Louderback, Larry A. Coldren, Ola Sj�lund, Eric R. Hegblom, Eva M. Strzelecka, Shigeru Nakagawa, Syn-Yem Hu, Dan D. Lofgreen, Ryan L. Naone, Jack Ko / 121
4.1 Introduction / 122
4.2 Scaling VCSEL Performance: Small, High-Performance VCSELs / 123
4.3 Monolithic Refractive Microlenses / 136
4.4 Monolithically Integrated VCSELs and Detectors with Microlenses / 141
4.5 WDM Pie-Shaped VCSELArrays / 168
4.6 Summary / 172
References / 173
John A. Trezza, Jeffry Powell, Richard J. Williams, Ronald J. Olson, Mani Sundaram, Keith Kang / 181
5.1 Introduction to Very-Large-Scale Heterogeneous Integration / 181
5.2 Devices and Device-Integration Techniques / 182
5.3 Applications / 198
5.4 Summary / 221
References / 222
Volkan H. Ozguz and John C. Carson / 225
6.1 Introduction / 225
6.2 Description of the Developed Molding Technique / 226
6.3 Application to Optoelectronic Integration / 232
6.4 Future Development, System Applications and Conclusions / 245
Acknowledgements / 247
References / 247
Hugo Thienpont, Valerie Baukens, Christof Debaes, Heidi Ottevaere, Pedro Vynck, Patrik Tuteleers, Guy Verschaffelt, Bart Volckaerts, Alex Hermanne, Mike Hanney, Marnik Brunfaut, Jan Van Campenhout, Irina Veretennicoff / 251
7.1 Introduction and Rationale / 251
7.2 The Concept / 255
7.3 Design of the Optical Bridge / 259
7.4 Fabrication with Deep Proton Lithography / 260
7.5 Proof-of-Principle Demonstration / 266
7.6 Mass-Fabrication and Tolerances / 268
7.7 Conclusion / 271
Acknowledgements / 273
References / 274


For some time now, the performance of electronic circuits based on silicon very large- scale-integration (VLSI) technology has doubled every eighteen months. Each reduction in the typical device feature size of most VLSI circuits has meant that more gates could be fabricated in a unit area of a chip. This, in turn, has implied an increase in the internal computational bandwidth of the chips. Connecting the VLSI chips to one another with wire interconnects is inefficient because the aggregate communication bandwidth of the wire links is only a small fraction of the internal computational bandwidth of the chips. To obtain the greatest benefit from the internal chip bandwidth, the chip-to-chip and board-to-board communication band-widths should be commensurate with, or at least be a reasonable fraction of the internal computational bandwidth of the chips. It is now evident that wire interconnections are not likely to meet the chip-to-chip and board-to-board communication needs of future high-performance information systems. A promising alternative scheme that is being explored by a number of groups is the use of optics at the chip-to-chip and board-to-board levels of the interconnection hierarchy. At this level of the hierarchy, however, there are a number of problems that must be resolved before optics can penetrate down to the chip-to-chip level. One of the major problems preventing the use of optics at this hierarchy is the incompatibility of silicon VLSI electronics technology with photonics technology. Photonics technology is largely based on group III and V compound semiconductors. Monolithic integration of the two technologies for low-cost, manufacturable, and practical chips appears to be out of the question. Because of the clear and obvious advantages of using optics in long-haul communications, a number of efforts are underway to extend these benefits to the chip-to-chip and board-to-board levels. The general heirarchy of optical interconnections is shown in Fig. 1.

At the present state of development, the use of optics in VLSI silicon electronics at the chip-to-chip level is likely to be implemented only in extremely high-performance systems, where the electrical solution is inadequate. At the board-to-board level, there appears to be no insurmountable difficulty in using optics. In fact, there are already several manufacturers seriously considering incorporating optics in their products for board-to- board interconnections. In addition to generic point-to-point links, optics is likely to be used in system clock distribution to alleviate skew and jitter problems in high-frequency systems.

The chapters in this book describe several approaches to developing the basic technologies necessary for optical interconnections. The approaches being pursued are hybrid in nature; they are more generally known as heterogeneous opto-electronic integration technologies. The premise of heterogeneous integration is that for the foreseeable future, silicon electronics will continue to be the dominant technology for computing, and photonics will dominate communications. Underlying this premise is a tacit acknowledgment of the economic reality that investments in billions of dollars have been made to build an extensive worldwide infrastructure for silicon-processing technology. Under these circumstances, it makes sense to explore techniques that harness the benefits of silicon electronics and III-V optoelectronics in certain high-performance applications.

The first chapter of the book, by Fonstad, describes three methods for integrating electronics with optoelectronics. The first of the methods discusses how optoelectronic devices, such as light-emitting diodes and photodetectors, can be integrated onto fairly complex electronic chips fabricated on GaAs substrates. The idea of the approach is to grow optoelectronic device structures in trenches etched in processed GaAs wafers with integrated electronic circuits on them. The second approach is to produce fused Si-on- GaAs wafers, which can be used for the epi-taxy of optoelectronic devices by opening windows to the GaAs substrates; these same wafers can then be used to produce CMOS- based chips. The third method is based on bonding of processed or partially processed optoelectronic devices onto selected sites on a processed silicon wafer.

The second chapter, by Chirovsky et al., describes a unique vertical-cavity surface- emitting laser (VCSEL) specifically designed for ease of integration with CMOS electronics. The p- and n-ohmic contacts to the device are intracavity contacts. This is in contrast to conventional VCSEL devices, where the contacts are fabricated on the top and bottom distributed-Bragg-reflector (DBR) mirrors. The current injected by the contacts is guided through an aperture defined by a shallow ion-implant region in the device cavity. In addition, this generation of VCSELs has a dielectric top mirror deposited after growth. Before the dielectric mirror stack is deposited, an index guide layer for beam guidance is first deposited. The authors have flip- chip bonded a 16 X 16 array of the devices to CMOS driving electronics. The flip-chip bonding is facilitated by the intracavity contacts, which are essentially coplanar.

The third chapter of the book is by Wilmsen and Pu. This chapter discusses methods of bonding VCSELs to CMOS electronics. The question of whether the substrate should be removed from the VCSELs is addressed. Other issues discussed in this chapter include the common fabrication sequences used. The authors end the chapter by discussing a potential application of VCSELs in a data-communication switch.

The fourth chapter is by Louderback et al. The authors of this chapter describe the design, fabrication, and characterization of high-performance VCSELs. They discuss the trade- offs made and scaling rules used to achieve single-mode, low-threshold-current operation of these devices with high wall-plug efficiencies. For free-space optical interconnections, the authors describe a scheme for integrating microlenses onto the VCSEL. The device arrays with microlenses also include integral resonant-cavity detectors. Finally, the authors discuss VCSEL-based short-distance multimode fiber links.

In Chapter 5, Trezza et al. discuss several integration technologies. Of the technologies they describe, flip-chip bonding is arguably the most advanced for bonding extremely large chip sizes to other chips or to substrates. They use this technology to bond GaAs optoelectronic device arrays onto silicon CMOS electronics. As an example, they describe the fabrication of large infrared focal-plane arrays for imaging. These arrays are based on GaAs/(Al,Ga)As quantum-well infrared photodetectors flip-chip bonded to silicon-readout CMOS electronics.

Chapter 6, by Ozguz and Carson, discusses integration of chips onto functional three- dimensional cubes. Their integration approach embeds electronic and opto-electronic chips in a transparent molding compound, allowing the incorporation of optical input/output elements for interconnections. Using this technology, the authors have been able to integrate molded VCSELs and detectors with appropriate control electronics; they have been able to demonstrate operation at 1 Gb/s.

The seventh and final chapter of the book is by Thienpont et al. These authors discuss the fabrication of multichannel free-space interconnection modules for inter- and intra-MCM interconnection distances. A single channel in the interconnection scheme discussed in this chapter has a transmission bit rate of 622 Mb/s. With 16 channels, this scheme is capable of operating at aggregate interconnection rates of up to 1 Tb/s cm 2 . The basic channel consists of a transmitter and a receiver connected by an optical bridge guide, which links the transmitter to the receiver.

The chapters in this book describe the significant progress has been made in the development of opteoelectronic devices, micro-optics, and integration technologies for optical interconnection modules. One of the key factors that is accelerating experimentation with optical interconnection technologies within information processing systems is the performance-limiting effects of conventional wire interconnects. The recognition that optics offers a potentially viable interconnection solution, and the rapid advances being made in the integration of optoelectronic devices with silicon CMOS technology, are creating the right mix of circumstances for the emergence of optics as an important enabling technology.

The preparation of this book without the combined efforts of many individuals would not have been possible. I would like to thank all the authors and co-authors for contributing their work to this volume. And finally, I want to acknowledge the support and assistance of Ms. Claire T. Heller during the preparation of this book.

Elias Towe
Arlington, Virginia
June 2000

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